Simoncic Richard J

SEC source: 0000827054-25-000119 · wk-form4a_1753133225.xml · derivative · entry 5

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 915

Underlying: Common Stock · 915 shares

Expires not disclosed

F6 · security: This Form 4 is being amended to correctly reflect the performance period for this PSU grant as 8 quarters. All subsequent Reports filed after this date are deemed to include the modification herein.

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F7 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 8 quarters ending June 30, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 8 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on August 15, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F7 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 8 quarters ending June 30, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 8 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on August 15, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000119 · wk-form4a_1753133225.xml · derivative · entry 4

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 914

Underlying: Common Stock · 914 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F5 · derivative.exercise_date: The restricted stock units will vest in full on August 15, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F5 · derivative.expiration_date: The restricted stock units will vest in full on August 15, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000119 · wk-form4a_1753133225.xml · derivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 3,412

Underlying: Common Stock · 3,412 shares

Expires not disclosed

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending June 30, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on August 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending June 30, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on August 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000119 · wk-form4a_1753133225.xml · derivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 3,412

Underlying: Common Stock · 3,412 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on August 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on August 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · derivative · entry 9

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 7,024

Underlying: Common Stock · 1,406 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F3 · derivative.exercise_date: The restricted stock units vest in four quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2024 and six quarterly installments of 702 shares beginning on May 15, 2025, as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F3 · derivative.expiration_date: The restricted stock units vest in four quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2024 and six quarterly installments of 702 shares beginning on May 15, 2025, as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · derivative · entry 8

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 2,416 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F2 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on the relative total shareholder return (TSR) of Microchip common stock compared to a peer group of twenty companies over a two-year period ending on March 31, 2022. The target number of PSU shares that may be earned is reported in the table above, the minimum number of shares that may be earned is zero if Microchip's TSR is at or lower than the 25th percentile of the peer group and the maximum number of shares that may be earned is 200% of the target if Microchip's TSR is at or higher than the 75th percentile of the peer group. Earned PSUs vested on May 15, 2024. Vested shares were delivered to the reporting person upon vest.

F2 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on the relative total shareholder return (TSR) of Microchip common stock compared to a peer group of twenty companies over a two-year period ending on March 31, 2022. The target number of PSU shares that may be earned is reported in the table above, the minimum number of shares that may be earned is zero if Microchip's TSR is at or lower than the 25th percentile of the peer group and the maximum number of shares that may be earned is 200% of the target if Microchip's TSR is at or higher than the 75th percentile of the peer group. Earned PSUs vested on May 15, 2024. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · derivative · entry 7

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 2,416 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F1 · derivative.exercise_date: The restricted stock units vested in full on May 15, 2024. Vested shares were delivered to the reporting person upon vest.

F1 · derivative.expiration_date: The restricted stock units vested in full on May 15, 2024. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · nonDerivative · entry 6

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 135,177

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · nonDerivative · entry 5

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 135,562

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · nonDerivative · entry 4

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 134,156

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · nonDerivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 134,409

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · nonDerivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 133,488

SEC source: 0000827054-24-000094 · wk-form4_1715979895.xml · nonDerivative · entry 1

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 134,151

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000010 · wk-form4_1775252095.xml · nonDerivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 146,127

F1 · balance_after: This Form 4 reflects an adjustment to reconcile the reporting person's previously reported holdings with his actual beneficial ownership as reflected in account statements. A Form 4 filed on March 4, 2026 mistakenly reported 159,862 shares of common stock under Table I, Column 5, however, the reporting owner correct beneficial ownership is 146,127 shares of common stock.

SEC source: 0000827054-24-000073 · wk-form4_1712350825.xml · derivative · entry 6

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 933

Underlying: Common Stock · 933 shares

Expires not disclosed

F3 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F7 · derivative.exercise_date: The restricted stock units will vest in full on May 17, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F7 · derivative.expiration_date: The restricted stock units will vest in full on May 17, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-24-000073 · wk-form4_1712350825.xml · derivative · entry 5

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 934

Underlying: Common Stock · 934 shares

Expires not disclosed

F1 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F6 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending March 31, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 17, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F6 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending March 31, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 17, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-24-000073 · wk-form4_1712350825.xml · derivative · entry 4

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 99

Underlying: Common Stock · 99 shares

Expires not disclosed

F3 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F5 · derivative.exercise_date: The restricted stock units will vest in full on February 16, 2026 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F5 · derivative.expiration_date: The restricted stock units will vest in full on February 16, 2026 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-24-000073 · wk-form4_1712350825.xml · derivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 3,482

Underlying: Common Stock · 3,482 shares

Expires not disclosed

F3 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: The restricted stock units will vest in full on May 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: The restricted stock units will vest in full on May 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-24-000073 · wk-form4_1712350825.xml · derivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Chief Operating Officer

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 3,483

Underlying: Common Stock · 3,483 shares

Expires not disclosed

F1 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending March 31, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending March 31, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000118 · wk-form4a_1753133209.xml · derivative · entry 6

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 933

Underlying: Common Stock · 933 shares

Expires not disclosed

F3 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F8 · derivative.exercise_date: The restricted stock units will vest in full on May 17, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F8 · derivative.expiration_date: The restricted stock units will vest in full on May 17, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000118 · wk-form4a_1753133209.xml · derivative · entry 5

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 934

Underlying: Common Stock · 934 shares

Expires not disclosed

F6 · security: This Form 4 is being amended to correctly reflect the performance period for this PSU grant as 8 quarters. All subsequent Reports filed after this date are deemed to include the modification herein.

F1 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F7 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 8 quarters ending March 31, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 8 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 17, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F7 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 8 quarters ending March 31, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 8 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 17, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000118 · wk-form4a_1753133209.xml · derivative · entry 4

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 99

Underlying: Common Stock · 99 shares

Expires not disclosed

F3 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F5 · derivative.exercise_date: The restricted stock units will vest in full on February 16, 2026 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F5 · derivative.expiration_date: The restricted stock units will vest in full on February 16, 2026 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000118 · wk-form4a_1753133209.xml · derivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 3,482

Underlying: Common Stock · 3,482 shares

Expires not disclosed

F3 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: The restricted stock units will vest in full on May 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: The restricted stock units will vest in full on May 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-25-000118 · wk-form4a_1753133209.xml · derivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 3,483

Underlying: Common Stock · 3,483 shares

Expires not disclosed

F1 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending March 31, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending March 31, 2027. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on May 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-24-000054 · wk-form4_1709673682.xml · nonDerivative · entry 1

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 131,735

F1 · kind: Shares were acquired under the Microchip Technology Incorporated 2001 Employee Stock Purchase Plan on March 1, 2024, in an exempt transaction pursuant to Rule 16(b)-3(d), paid for by contributions made during the six month period ended February 29, 2024.

SEC source: 0000827054-24-000043 · wk-form4_1708464364.xml · derivative · entry 6

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 8,430

Underlying: Common Stock · 1,406 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F2 · derivative.exercise_date: The restricted stock units vest in three quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units vest in three quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-24-000043 · wk-form4_1708464364.xml · derivative · entry 5

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 1,762 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F1 · derivative.exercise_date: The restricted stock units vested in full on February 15, 2024. Vested shares were delivered to the reporting person upon vest.

F1 · derivative.expiration_date: The restricted stock units vested in full on February 15, 2024. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-24-000043 · wk-form4_1708464364.xml · nonDerivative · entry 4

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 131,350

SEC source: 0000827054-24-000043 · wk-form4_1708464364.xml · nonDerivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 131,809

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0000827054-24-000043 · wk-form4_1708464364.xml · nonDerivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 130,403

SEC source: 0000827054-24-000043 · wk-form4_1708464364.xml · nonDerivative · entry 1

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 130,883

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0000827054-24-000016 · wk-form4_1706725738.xml · derivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,643

Underlying: Common Stock · 2,643 shares

Expires not disclosed

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on February 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on February 15, 2028 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-24-000016 · wk-form4_1706725738.xml · derivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,642

Underlying: Common Stock · 2,642 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on February 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on February 15, 2028 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-23-000198 · wk-form4_1700257771.xml · derivative · entry 6

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 9,836

Underlying: Common Stock · 1,406 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F2 · derivative.exercise_date: The restricted stock units vest in three quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units vest in three quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-23-000198 · wk-form4_1700257771.xml · derivative · entry 5

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 3,708 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F1 · derivative.exercise_date: The restricted stock units vested in full on November 15, 2023 . Vested shares were delivered to the reporting person upon vest.

F1 · derivative.expiration_date: The restricted stock units vested in full on November 15, 2023 . Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-23-000198 · wk-form4_1700257771.xml · nonDerivative · entry 4

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 129,121

SEC source: 0000827054-23-000198 · wk-form4_1700257771.xml · nonDerivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 129,717

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0000827054-23-000198 · wk-form4_1700257771.xml · nonDerivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 128,311

SEC source: 0000827054-23-000198 · wk-form4_1700257771.xml · nonDerivative · entry 1

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 129,884

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0000827054-23-000178 · wk-form4_1696452191.xml · derivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,919

Underlying: Common Stock · 2,919 shares

Expires not disclosed

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on November 15, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on November 15, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-23-000178 · wk-form4_1696452191.xml · derivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,919

Underlying: Common Stock · 2,919 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on November 15, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on November 15, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-23-000144 · wf-form4_169221864245403.xml · derivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 3,770 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F1 · derivative.exercise_date: The restricted stock units vested in full on August 15, 2023. Vested shares were delivered to the reporting person upon vest.

F1 · derivative.expiration_date: The restricted stock units vested in full on August 15, 2023. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-23-000144 · wf-form4_169221864245403.xml · nonDerivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 126,176

SEC source: 0000827054-23-000144 · wf-form4_169221864245403.xml · nonDerivative · entry 1

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 127,775

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0000827054-23-000116 · wf-form4_168876397642968.xml · derivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,587

Underlying: Common Stock · 2,587 shares

Expires not disclosed

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending June 30, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on August 15, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending June 30, 2026. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 42.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on August 15, 2027 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-23-000116 · wf-form4_168876397642968.xml · derivative · entry 2

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,587

Underlying: Common Stock · 2,587 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on August 15, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on August 15, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000827054-23-000072 · wf-form4_168435680864656.xml · derivative · entry 6

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 3,940 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F2 · derivative.exercise_date: The restricted stock units vested in full on May 15, 2023. Vested shares were delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units vested in full on May 15, 2023. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-23-000072 · wf-form4_168435680864656.xml · derivative · entry 5

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 2,002 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F1 · derivative.exercise_date: The restricted stock units vested in twelve equal quarterly installments beginning August 15, 2020. Vested shares were delivered to the reporting person upon vest.

F1 · derivative.expiration_date: The restricted stock units vested in twelve equal quarterly installments beginning August 15, 2020. Vested shares were delivered to the reporting person upon vest.

SEC source: 0000827054-23-000072 · wf-form4_168435680864656.xml · nonDerivative · entry 4

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 124,005

SEC source: 0000827054-23-000072 · wf-form4_168435680864656.xml · nonDerivative · entry 3

SIMONCIC RICHARD J · CIK 0001181945 · Exec VP, Analog/Intrfce BU

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 125,390

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.