Simoncic Richard J

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · derivative · entry 20

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 110 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F6 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2025. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on February 16, 2026. Vested shares were delivered to the reporting person upon vest.

F6 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2025. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on February 16, 2026. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · derivative · entry 19

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 678 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F5 · derivative.exercise_date: The restricted stock units vested in full on February 16, 2026. Vested shares were delivered to the reporting person upon vest.

F5 · derivative.expiration_date: The restricted stock units vested in full on February 16, 2026. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 14

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 159,431

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 13

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 159,459

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 12

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 159,360

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 11

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 159,391

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 10

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 159,281

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 9

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 159,467

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · derivative · entry 18

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 1,831 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on February 15, 2026. Vested shares were delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on February 15, 2026. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · derivative · entry 17

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 1,219 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F3 · derivative.exercise_date: The restricted stock units vested in full on February 15, 2026. Vested shares were delivered to the reporting person upon vest.

F3 · derivative.expiration_date: The restricted stock units vested in full on February 15, 2026. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · derivative · entry 16

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 1,404

Underlying: Common Stock · 1,222 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F2 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested ratably over eight quarters beginning on November 15, 2024 as long as the reporting person remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F2 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested ratably over eight quarters beginning on November 15, 2024 as long as the reporting person remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · derivative · entry 15

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 1,404

Underlying: Common Stock · 702 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F1 · derivative.exercise_date: The restricted stock units vest in four quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F1 · derivative.expiration_date: The restricted stock units vest in four quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 8

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 158,789

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 7

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 159,342

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 6

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 157,511

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 5

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 157,845

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 4

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 156,626

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 3

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 156,961

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 155,739

SEC source: 0001181945-26-000006 · wk-form4_1771538180.xml · nonDerivative · entry 1

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 155,931

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-26-000004 · wk-form4_1770759894.xml · derivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 608

Underlying: Common Stock · 608 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on February 16, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on February 16, 2027 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0000109563-26-000010 · wk-form4_1769030295.xml · nonDerivative · entry 1

Simoncic Richard J · CIK 0001181945 · Director

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 1,490

F1 · shares: Shares of restricted stock granted under the 2023 Long-Term Performance Plan that vest one year from the date of the grant.

SEC source: 0001181945-26-000002 · wk-form4_1767734640.xml · derivative · entry 3

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 4,806

Underlying: Common Stock · 4,806 shares

Expires not disclosed

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2028. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 30.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on February 15, 2030 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending December 31, 2028. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 30.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on February 15, 2030 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0001181945-26-000002 · wk-form4_1767734640.xml · derivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 4,805

Underlying: Common Stock · 4,805 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on February 15, 2030 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on February 15, 2030 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · derivative · entry 18

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 388 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F6 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2025. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on November 17, 2025. Vested shares were delivered to the reporting person upon vest.

F6 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2025. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on November 17, 2025. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · derivative · entry 17

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 736 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F5 · derivative.exercise_date: The restricted stock units vested in full on November 17, 2025. Vested shares were delivered to the reporting person upon vest.

F5 · derivative.expiration_date: The restricted stock units vested in full on November 17, 2025. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 12

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 155,229

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 11

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 155,394

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 10

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 155,006

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 9

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 155,318

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · derivative · entry 16

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,106

Underlying: Common Stock · 1,222 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested ratably over eight quarters beginning on November 15, 2024 as long as the reporting person remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested ratably over eight quarters beginning on November 15, 2024 as long as the reporting person remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · derivative · entry 15

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,106

Underlying: Common Stock · 702 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F3 · derivative.exercise_date: The restricted stock units vest in four quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F3 · derivative.expiration_date: The restricted stock units vest in four quarterly installments of 1,406 shares beginning November 15, 2023, one quarterly installment of 702 shares on November 15, 2024, one quarterly installment of 704 shares on February 15, 2025 and six quarterly installments of 702 shares beginning on May 15, 2025 as long as the individual remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · derivative · entry 14

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 2,447 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F2 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on November 15, 2025. Vested shares were delivered to the reporting person upon vest.

F2 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested on November 15, 2025. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · derivative · entry 13

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 0

Underlying: Common Stock · 1,404 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F1 · derivative.exercise_date: The restricted stock units vested in full on November 15, 2025. Vested shares were delivered to the reporting person upon vest.

F1 · derivative.expiration_date: The restricted stock units vested in full on November 15, 2025. Vested shares were delivered to the reporting person upon vest.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 8

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 154,582

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 7

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 155,100

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 6

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 153,878

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 5

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 154,176

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 4

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 153,474

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 3

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 154,313

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 151,866

SEC source: 0001181945-25-000012 · wk-form4_1763595036.xml · nonDerivative · entry 1

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 152,461

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

SEC source: 0001181945-25-000010 · wk-form4_1762810610.xml · derivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 846

Underlying: Common Stock · 846 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on November 15, 2026 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on November 15, 2026 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0001181945-25-000006 · wk-form4_1759524883.xml · derivative · entry 3

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 4,875

Underlying: Common Stock · 4,875 shares

Expires not disclosed

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2028. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 29.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on November 15, 2029 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2028. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 29.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on November 15, 2029 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0001181945-25-000006 · wk-form4_1759524883.xml · derivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 4,874

Underlying: Common Stock · 4,874 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on November 15, 2029 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on November 15, 2029 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0001181945-25-000008 · wk-form4a_1759784499.xml · derivative · entry 3

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 4,875

Underlying: Common Stock · 4,875 shares

Expires not disclosed

F3 · derivative.exercise_price: Each performance stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2028. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 30.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on November 15, 2029 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F5 · derivative.exercise_date: This Amended Form 4 is filed to accurately report the non-GAAP operating margin as 30.0%. All subsequent reports filed after this date are deemed to include the modification herein.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2028. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 30.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs will vest on November 15, 2029 as long as the reporting person remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F5 · derivative.expiration_date: This Amended Form 4 is filed to accurately report the non-GAAP operating margin as 30.0%. All subsequent reports filed after this date are deemed to include the modification herein.

SEC source: 0001181945-25-000008 · wk-form4a_1759784499.xml · derivative · entry 2

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 4,874

Underlying: Common Stock · 4,874 shares

Expires not disclosed

F1 · derivative.exercise_price: Each restricted stock unit represents a contingent right to receive one share of Microchip Technology Incorporated common stock.

F2 · derivative.exercise_date: The restricted stock units will vest in full on November 15, 2029 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

F2 · derivative.expiration_date: The restricted stock units will vest in full on November 15, 2029 as long as the individual remains a service provider through the vesting date. Vested shares will be delivered to the reporting person upon vest.

SEC source: 0001181945-25-000004 · wk-form4_1756932992.xml · nonDerivative · entry 1

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 151,057

F1 · kind: Shares were acquired under the Microchip Technology Incorporated 2001 Employee Stock Purchase Plan on September 2, 2025, in an exempt transaction pursuant to Rule 16(b)-3(d), paid for by contributions made during the six month period ended August 31, 2025.

SEC source: 0000827054-25-000177 · wk-form4_1756337787.xml · nonDerivative · entry 1

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Indirect · Shares held Indirectly, by Trust.

Disclosed balance after: 151,001

SEC source: 0000827054-25-000157 · wk-form4_1755639489.xml · derivative · entry 12

Simoncic Richard J · CIK 0001181945 · CHIEF OPERATING OFFICER

10b5-1 filing: No plan indicated

Ownership: Direct

Disclosed balance after: 2,808

Underlying: Common Stock · 1,222 shares

Expires not disclosed

Exercise/conversion can include RSU settlement. Transaction price and option strike are different fields; a missing price is not zero. Derivative and underlying rows can describe the same event.

F4 · derivative.exercise_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested ratably over eight quarters beginning on November 15, 2024 as long as the reporting person remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.

F4 · derivative.expiration_date: Each Performance Stock Unit (PSU) granted under the Microchip Technology Incorporated (Microchip) 2004 Equity Incentive Plan represents a contingent right to receive shares of Microchip common stock based on Microchip's cumulative non-GAAP operating margin over a period of 12 quarters ending September 30, 2024. The target number of PSU shares that may be earned is reported in the table above and is based on Microchip achieving a cumulative non-GAAP operating margin of 40.0% over the 12 quarter measurement period. The actual number of shares that may be earned can be higher or lower than the target depending on Microchip's non-GAAP operating margin over the measurement period. Earned PSUs vested ratably over eight quarters beginning on November 15, 2024 as long as the reporting person remains a service provider through the vesting date. Vested shares were delivered to the reporting person upon vest.